Production Readiness Review
of the ATLAS Muon TDC (AMT)
(20th June, 2002)

Last update Feb. 14, 2004

1. Specifications of AMT (Yasuo Arai, KEK)

2. Description of Circuit (Yasuo Arai)

3. Design Verification (Yasuo Arai)

4. Michigan Tests of the AMT-2 and octal mezzanine cards (Jeff Gregory on beharf of Tiesheng Dai and Jay Chapman, Univ. of Michigan)

5. Radiation tests results (Yasuo Arai)

6. Production schedule, and QC procedures (Yasuo Arai)

Documents for the PRR

• AMT PRR Document (v1.1)
• ATLAS Standard TID Test Report
• AMT TID test report
• ATLAS Standard SEE Test Report
• AMT SEE test report(revised June 6)

Related Materials

• AMT-1&2 manual
• AMT-2&3 Data Sheet
• "Requirements and Specifications of the TDC for the ATLAS Precisionuon tracker" , ATLAS Internal Note: MUON-NO-179, May 1997.
• "Development of Front-end Electronics and TDC LSI for the ATLAS MDT", NIM A453(2000)365-371.
• "Development and a SEU Test of a TDC LSI for the ATLAS Muon Detctor", 7th Workshop on Electronics for LHC Experiments, Sep. (2001)
• "Development of a 24 ch TDC LSI for the ATLAS Muon Detector", 6th Workshop on Electronics for LHC Experiments, Sep. (2000)
• "PERFORMANCE AND IRRADIATION TESTS OF THE 0.3 um CMOS TDC FOR THE ATLAS MDT", 5th Workshop on Electronics for LHC Experiments, Sep. (1999)
• "TDC Architecture Study for the ATLAS Muon Tracker" 3rd Workshop on Electronics for LHC Experiments, Sep. (1997)
• "Time Memory Cell VLSI and a High-Speed Serial Interface", 1st Workshop on Electronics for LHC Experiments, Sep. (1995)